Zerun Li

1 paper in the IJCAI proceedings

IJCAI 2026

QiMeng-VPID: Verification-Grounded Port-Level Iterative Decomposition for Complex Verilog Generation

with Hongguang Wang, Jiaming Guo, Rui Zhang, Di Huang, Pengwei Jin, Zidong Du, Xing Hu, Qi Guo, Yunji Chen

doi:10.24963/ijcai.2026/47

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